1. Field of the Invention
The present invention relates in general to the field of signal processing, and, more specifically, to a power control system that includes a nonlinear delta-sigma modulator with nonlinear power conversion process modeling.
2. Description of the Related Art
Many electronic systems utilize nonlinear processes to generate output signals. For example, plant systems, such as servo control systems and power conversion systems, often utilize nonlinear processes. Power control systems often utilize a switching power converter to convert alternating current (AC) voltages to direct current (DC) voltages or DC-to-DC. Switching power converters often includes a nonlinear energy transfer process to provide power factor corrected energy to a load. Power control systems provide power factor corrected and regulated output voltages to many devices that utilize a regulated output voltage.
FIG. 1 represents a power control system 100, which includes a switching power converter 102. Voltage source 101 supplies an alternating current (AC) input voltage Vin(t) to a full, diode bridge rectifier 103. The voltage source 101 is, for example, a public utility, and the AC voltage Vin(t) is, for example, a 60 Hz/110 V line voltage in the United States of America or a 50 Hz/220 V line voltage in Europe. The rectifier 103 rectifies the input voltage Vin(t) and supplies a rectified, time-varying, line input voltage Vx(t) to the switching power converter.
The switching power converter 102 includes power factor correction (PFC) stage 124 and driver stage 126. The PFC stage 124 is controlled by switch 108 and provides power factor correction. The driver stage 126 is also controlled by switch 108 and regulates the transfer of energy from the line input voltage Vx(t) through inductor 110 to capacitor 106. The inductor current iL ramps ‘up’ when the switch 108 conducts, i.e. is “ON”. The inductor current iL ramps down when switch 108 is nonconductive, i.e. is “OFF”, and supplies current iL to recharge capacitor 106. The time period during which inductor current iL ramps down is commonly referred to as the “inductor flyback time”. Diode 111 prevents reverse current flow into inductor 110. In at least one embodiment, the switching power converter 102 operates in discontinuous current mode, i.e. the inductor current iL ramp up time plus the inductor flyback time is less than the period of switch 108.
Input current iL is proportionate to the ‘on-time’ of switch 108, and the energy transferred to inductor 110 is proportionate to the ‘on-time’ squared. Thus, the energy transfer process is one embodiment of a nonlinear process. In at least one embodiment, control signal CS0 is a pulse width modulated signal, and the switch 108 is an n-channel field effect transistor that conducts when the pulse width of CS0 is high. Thus, the ‘on-time’ of switch 108 is determined by the pulse width of control signal CS0. Accordingly, the energy transferred to inductor 110 is proportionate to a square of the pulse width of control signal CS0.
Capacitor 106 supplies stored energy to load 112. The capacitor 106 is sufficiently large so as to maintain a substantially constant output voltage Vx(t), as established by a power factor correction (PFC) and output voltage controller 114 (as discussed in more detail below). The output voltage Vx(t) remains substantially constant during constant load conditions. However, as load conditions change, the output voltage Vx(t) changes. The PFC and output voltage controller 114 responds to the changes in Vx(t) and adjusts the control signal CS0 to resume a substantially constant output voltage as quickly as possible. The output voltage controller 114 includes a small capacitor 115 to filter any high frequency signals from the line input voltage Vx(t).
The power control system 100 also includes a PFC and output voltage controller 114. PFC and output voltage controller 114 controls switch 108 and, thus, controls power factor correction and regulates output power of the switching power converter 102. The goal of power factor correction technology is to make the switching power converter 102 appear resistive to the voltage source 101. Thus, the PFC and output voltage controller 114 attempts to control the inductor current iL so that the average inductor current iL is linearly and directly related to the line input voltage Vx(t). Prodić, Compensator Design and Stability Assessment for Fast Voltage Loops of Power Factor Correction Rectifiers, IEEE Transactions on Power Electronics, Vol. 22, No. 5, September 2007, pp. 1719-1729 (referred to herein as “Prodić”), describes an example of PFC and output voltage controller 114. The PFC and output voltage controller 114 supplies a pulse width modulated (PWM) control signal CS0 to control the conductivity of switch 108. In at least one embodiment, switch 108 is a field effect transistor (FET), and control signal CS0 is the gate voltage of switch 108. The values of the pulse width and duty cycle of control signal CS0 depend on two feedback signals, namely, the line input voltage Vx(t) and the capacitor voltage/output voltage Vc(t).
PFC and output controller 114 receives two feedback signals, the line input voltage Vx(t) and the output voltage Vc(t), via a wide bandwidth current loop 116 and a slower voltage loop 118. The line input voltage Vx(t) is sensed from node 120 between the diode rectifier 103 and inductor 110. The output voltage Vc(t) is sensed from node 122 between diode 111 and load 112. The current loop 116 operates at a frequency fc that is sufficient to allow the PFC and output controller 114 to respond to changes in the line input voltage Vx(t) and cause the inductor current iL to track the line input voltage to provide power factor correction. The current loop frequency is generally set to a value between 20 kHz and 100 kHz. The voltage loop 118 operates at a much slower frequency fv, typically 10-20 Hz. By operating at 10-20 Hz, the voltage loop 118 functions as a low pass filter to filter an alternating current (AC) ripple component of the output voltage Vc(t).
The PFC and output voltage controller 114 controls the pulse width (PW) and period (TT) of control signal CS0. Thus, PFC and output voltage controller 114 controls the nonlinear process of switching power converter 102 so that a desired amount of energy is transferred to capacitor 106. The desired amount of energy depends upon the voltage and current requirements of load 112. To regulate the amount of energy transferred and maintain a power factor correction close to one, PFC and output voltage controller 114 varies the period of control signal CS0 so that the input current iL tracks the changes in input voltage Vx(t) and holds the output voltage VC(t) constant. Thus, as the input voltage Vx(t) increases, PFC and output voltage controller 114 increases the period T of control signal CS0, and as the input voltage Vx(t) decreases, PFC and output voltage controller 114 decreases the period of control signal CS0. At the same time, the pulse width PW of control signal CS0 is adjusted to maintain a constant duty cycle (D) of controls signal CS0, and, thus, hold the output voltage VC(t) constant. In at least one embodiment, the PFC and output voltage controller 114 updates the control signal CS0 at a frequency much greater than the frequency of input voltage Vx(t). The frequency of input voltage Vx(t) is generally 50-60 Hz. The frequency 1/TT of control signal CS0 is, for example, between 25 kHz and 100 kHz. Frequencies at or above 25 kHz avoid audio frequencies and frequencies at or below 100 kHz avoids significant switching inefficiencies while still maintaining good power factor correction, e.g. between 0.9 and 1, and an approximately constant output voltage VC(t).
FIG. 2 depicts a generalized representation of a power control system 200 described in Prodić. The PFC and output voltage controller 202 of Prodić includes an error generator 204 to determine an error signal ed(t). The error signal ed(t) represents a difference between the output voltage Vx(t) and a reference voltage VREF. The reference voltage VREF is set to the desired value of output voltage Vc(t). A comb filter 206 filters the error signal ed(t). The comb filter 206 has significant attenuation at equally spaced frequencies (referred to as “notches”) and has unity gain at other frequencies. The comb filter 206 automatically tunes the notches to match twice the line frequency fL and harmonics of the line frequency. The line frequency fL is the frequency of input voltage Vin(t). According to Prodić, the comb filter 206 generates a “ripple free” error signal evf(t). Compensator 208 processes the filtered error signal, and input voltage feedback signal Vx(t) generates a compensator output signal. The pulse width modulator (PWM) 210 processes the compensator output signal to generate control signal CS0.